In general, in methods for scanning signals using scanning devices, such as CCD, there are interlace method and non-interlace method.
Of the methods, the non-interlace method is a method that a frame divided into a plurality of fields is scanned in the order of reception of filed data, and the interlace method is a method that a frame is divided into even fields and odd fields, which fields are scanned by corresponding even field data and odd field data, alternatively, scanned by the odd field data first, followed by even field data according to the order of reception of the field data.
Therefore, the non-interlace method is used in military equipment such as missile because the speed of scanning of the non-interlace method is fast, which allows to catch an image of an object moving fast quickly, whereas the interlace method is mostly used in scanning of a TV picture frame of NTSC method or PAL method because the speed of scanning of the interlace method is slow, providing a sense of stability of the picture.
A general CCD image sensor according to the foregoing interlace method is an image sensing element generating video signals, including, as shown in FIG. 1, a plurality of photo diode regions arranged in an array in a form of matrix with a fixed distance between them on a semiconductor substrate such as silicon, generating image signal charges by converting photo signals into electrical signals, a plurality of vertical charge coupled device(VCCD) regions each formed between the photo diode regions in vertical direction for transmitting the image signal charges generated in the photo diode regions in vertical direction, a horizontal charge coupled device region formed below the VCCD regions in horizontal direction for transmitting the image signal charges in horizontal direction transmitted from the VCCD regions in vertical direction, and a sensing amplifier for sensing the image signal charges transmitted from the HCCD region.
The photo diode regions and the VCCD regions of a conventional CCD image sensor is explained hereinafter, referring to the attached drawings.
Shown in FIG. 2 is a layout of transfer gates of a conventional CCD image sensor, shown in FIG. 3 is a plan view of a metal wiring and an optical shielding layer of a conventional CCD image sensor, and shown in FIG. 4 is a section across line A-A' of FIG. 3, wherein the image signal charge accumulated in the photo diodes(PD) is transmitted to the VCCD regions, and a plurality of transfer gates PG.sub.1 to PG.sub.4 are formed on the VCCD regions for transmitting the image signal charge from the VCCD regions vertically.
Herein, there are two transfer gates TG which are provided for transmitting the image signal charge accumulated in the photo diodes to the VCCD regions, corresponding to each frame having two field.
That is, a first transfer gate TG.sub.1 is a transfer gate for transmitting the signal charge of the photo diodes PD1 arranged at odd numberth counted in vertical direction within the odd fields, i.e., arranged at odd numberth HCCD lines, to VCCD region, and a second transfer gate TG.sub.2 is a transfer gate for transmitting the signal charge of the photo diodes PD.sub.2 arranged within the even fields counted in vertical direction, ie., arranged in even numberth HCCD lines, to VCCD regions.
The first transfer gate TG.sub.1 is connected to the first transfer gate electrode PG.sub.1, and the second transfer gate TG.sub.2 is connected to the third transfer gate electrode PG.sub.3, wherein the image signal charges accumulated in the photo diodes PD are transmitted to VCCD region at the time of application of a trigger voltage of a VCCD clock signals V.o slashed..sub.1 and V.o slashed..sub.3 applied to the transfer gates PG.sub.1 and PG.sub.3, which is transmitted in four phases due to the clock signals V.o slashed., V.o slashed..sub.2, V.o slashed..sub.3 and V.o slashed..sub.4.
The image signal charges transmitted to the VCCD region are provided of transmittal in vertical direction by the potential of the VCCD clock signals V.o slashed..sub.1 to V.o slashed..sub.4 applied to the transfer gate electrodes PG.sub.1 to PG.sub.4.
In the CCD image sensor described above, optical shielding metal(OSM) is formed over the VCCD regions, HCCD region and transfer gates as shown in FIGS. 3 and 4.
That is, since the photo diode regions should receive lights to generate image signal charges, and in order to make the HCCD region and the VCCD regions transmit only the image signal charges generated in the photo diode regions in order by way without the image signal charges mixed up with adjacent ones, lights should be shielded in all regions including the HCCD region and VCCD regions, the OSM is provided on all over the surface except the photo diode regions.
The operation of such a conventional CCD image sensor according to the interlace method is as follows.
Shown in FIG. 5(a) is tining of VCCD clock signals V.o slashed..sub.1 to Ve.sub.4 for applying to the transfer gate electrodes PG.sub.1 and PG.sub.2, and shown in FIG. 5(b) are VCCD clock signals V.o slashed..sub.1 to V.o slashed..sub.4 within a unit section K of FIG. 5(a).
When light is incident to a photo diode PD, image signal charge is generated in the photo diode PD according to the intensity of light incident thereto, which generated image signal charge is transmitted to a VCCD region in response to the VCCD clock signals V.o slashed..sub.1 to V.o slashed..sub.4 applied to the transfer gate electrodes PG.sub.1, PG.sub.2, PG.sub.3 and PG.sub.4.
That is, the image signal charges of the odd fields are transmitted in response to the VCCD clock signals V.o slashed..sub.1 and V.o slashed..sub.2 applied to the transfer gate electrodes PG.sub.1 and PG.sub.2 : on application of voltage V.sub.1 at a high state to the first transfer gate TG.sub.1, the signal charge generated in a photo diode PD.sub.1 arranged on an odd numberth HCCD line is transmitted to a VCCD region.
On the other hand, the image signal charges of the even fields are transmitted in response to the VCCD clock signals V.o slashed..sub.3 and V.o slashed..sub.4 applied to the transfer gates PG.sub.3 and PG.sub.4 : on application of voltage V.sub.2 at a high state to the second transfer gate TG.sub.2, the signal charges generated in the photo diode PD.sub.2 arranged on an .even numberth HCCD line are transmitted to the HCCD region.
The signal charges transmitted to the VCCD regions are, as shown in FIG. 5(b), transmitted to the HCCD region of the VCCD clock signal by the potential applied to the transfer gate electrodes PG.sub.1 to PG.sub.4, then transmitted to the sensing amplifier in response to the HCCD clock applied to the HCCD region, and finally transmitted to outside as information voltage by the sensing amplifier.
However, the foregoing conventional CCD image sensor according to the interlace method has following problems.
First, since the widths of transfer gate electrodes PG.sub.1, PG.sub.2, PG.sub.3 and PG.sub.4 to which the VCCD clock signals V.o slashed..sub.1 to V.o slashed..sub.4 are applied become narrower according to the developments of CCD image sensors to higher resolution and higher pixels (One million to two million pixels), the surface resistance of the transfer gate electrodes becomes greater.
Accordingly, clock frequency of fast VCCD clock signals V.o slashed..sub.1 to V.o slashed..sub.4 can not be transmitted quickly, lowering charge transfer efficiency of image signal charges resulting in bad resolution.
Second, since the widths of the transfer gate electrodes become narrower, there is possibility of breakage of lines, and once breakage should happen on the transfer gate electrodes, the image signal charges of the photo diodes having the line broken can not be transmitted, reducing the reliability.
The object of this invention designed for solving the foregoing problems, lies on improving charge transfer efficiency of image signal charges by reducing resistance of transfer gate electrodes even at high pixel density.
These and other objects and features of this invention can be achieved by providing a CCD image sensor including a plurality of photoelectric conversion regions for converting lights incident to a semiconductor substrate into image signal charges, a plurality of vertical charge coupled device regions for transmitting image signal charges generated in photoelectric conversion regions in vertical direction, a plurality of transfer gate electrodes for transmitting the image signal charges generated in the photoelectric conversion regions in four phases, an insulation film for isolating the transfer gate electrodes, first metal layers formed over regions excluding the photoelectric conversion regions and the vertical charge coupled device regions for shielding lights, and second metal layers formed over the vertical charge coupled devices for connecting between transfer gate electrodes having same clock signals applied thereto within same vertical charge coupled device and shielding lights incident to the vertical charge coupled device, and a method for fabricating a charge coupled device image sensor including processes for forming a plurality of photoelectric conversion regions and vertical charge coupled device regions by an selective ion injection of a second conduction type into first conduction type semiconductor substrate, forming a plurality of transfer gate electrodes for transmitting image signals in four phases over the vertical charge coupled regions after forming gate insulation film on all over the surface, forming optical shielding metal on all over the surface after depositing a first insulation film on all over the surface, forming a first metal layer by selective removal of the optical shielding metal of the photoelectric conversion regions and the vertical charge coupled device regions, forming contact holes for exposing transfer gate poles same clock signals applied thereto within same vertical charge coupled device-region-of the vertical charge coupled device regions of the vertical charge coupled device regions after depositing a second insulation film on all over the surface, and forming a second metal layer by depositing optical shielding and conductive metal on all over the surface and carrying out patterning leaving the optical shielding and conductive metal only over the vertical charge coupled device regions.